In the field of computer network protocols, and in particular industrial computer network protocols, network nodes are often required to transmit a frame after a defined period of time following the occurrence of an event. Examples of such events following which a frame is to be transmitted may comprise, say, receipt of specific messages, interrupts, error cases, counters reaching respective thresholds, changes of state in a state diagram, etc.
For example, PROFIBUS (Process Field Bus) is a computer network protocol standard for fieldbus communication in automation technology, used in automation applications for the control of productions lines and other machinery. A typical PROFIBUS network contains master nodes and slave nodes. When a master node sends a request to a slave node, the slave node must respond (e.g. transmit a response frame) after a system wide minimum response time. The PROFIBUS protocol requires that responses are issued after a programmable system wide minimum response time has expired in order to ensure slower devices have sufficient time to process the request.
To transmit a response frame deterministically (within a user defined latency and jitter), in response to, say, a request received in a request frame, dedicated hardware or timers are often used within the MAC (media access control) layer of the network interface node to tightly control the latency and jitter. However, providing such dedicated hardware increases the cost of the hardware components within each node. In order to enable lower costs solutions to be implemented, it is desirable to use more generic MAC modules, for example UART (universal asynchronous receiver/transmitter) MAC modules.
To transmit a response frame deterministically (within a user defined latency and jitter), in response to, say, a request frame using such a generic MAC module requires the timing of the transmission of frames in response to events to be controlled within software, for example by way of the transmit threads responsible for the transmission of the frames, such threads typically running on a RISC (Reduced Instruction Set Computer) processor operably coupled to the MAC module. Conventionally, such control is implemented through the use of a response timer, which is initialised upon the occurrence of the respective event (e.g. the receipt of a master node request in a PROFIBUS network), with expiry of the response timer triggering the transmission of the response frame.
Generic MAC modules often have independent Rx (receiver) and Tx (transmit) threads running on the RISC processor for each port, with each port comprising separate Rx and Tx FIFO buffers. When the Tx FIFO buffer has available capacity, it generates a request to the Tx thread for data to be transmitted. If data is available for transmission the Tx thread will cause a unit of data (e.g. a UART character) to be placed into the Tx FIFO buffer in response to each request received from the Tx FIFO buffer.
Conventionally, the Tx thread for a port is enabled to service requests indefinitely. This allows the Tx thread to be able to service a request from the Tx FIFO buffer for new data to transmit as quickly as possible in order to minimise any latency in the transmission of data. In particular, by enabling the Tx thread to service requests indefinitely, the Tx thread is able to place response frame data within the Tx FIFO buffer for transmission as soon as the response timer has expired and the RISC processor stops processing its current task (assuming the Tx FIFO buffer has available capacity). However, a problem with such a conventional solution is that when no data is available for transmission, or the response timer has not yet expired, the Tx thread will continuously be running to handle the Tx FIFO requests when no data is available to transmit, consuming a lot of unnecessary bus and RISC processor bandwidth.